12:03:36 From Stephane Boucher : https://www.embeddedonlineconference.com/theatre/Back_to_the_future_with_embedded_software
12:12:06 From Erwin : Does this mean that during Debug Session you need one core for Debugging?
12:13:56 From Erwin : Thanks
12:14:04 From Radu Pralea : So, essentially, this approach (architecture) aims at making concurrency + real-time very simple & straight forward, but only as long as you have less processes than number of cores (which is reasonable in so many practical scenarios), isn't it?
12:18:17 From Matt Liberty : How does XMOS stack up to other architectures with compute power per Watt?
12:18:58 From Erwin : Also DevKits are a little bit out of stock Right now!
12:19:25 From 1 - Matthew Lai : Is the XMOS ISA similar to or quite different from RISC-V ISA?
12:21:26 From Matt Liberty : Yes. Thank you!
12:22:54 From 1 - Matthew Lai : Cool. Thanks.
12:23:03 From Radu Pralea : I remember such an approach back in the mid 2000s (I've even worked at a company that tried it): an array of simple but many cores: PicoChip. I've just googled, and XMOS and PicoChip seem to share some key people :) Could you comment, please? (also about the fact that after the acquisition (I think it ended with Intel acquiring Mindspeed) I've never heard of this architecture?
12:23:45 From Radu Pralea : indeed
12:24:23 From Radu Pralea : Thanks
12:24:23 From Keith J : Thank you Henk
12:24:31 From Ian Ross : Thanks, Henk!
12:24:36 From Steve Wheeler : Thank you.
12:24:51 From Carlos Amaya : Thank you
12:24:55 From RonCollinson : Cheers, Henk
12:25:03 From Erwin : Thanks a lot, interresting approach!