Drew Fustini is a Linux kernel developer at BayLibre and serves as an ambassador for RISC-V International. He sits on the board of directors for the BeagleBoard.org Foundation and the Open Source Hardware Association (OSHWA). Drew also enjoys designing open source hardware projects in KiCad.
It is an exciting time for Linux on RISC-V, the open instruction set (ISA) that is quickly gaining critical mass. I will introduce the pieces needed to boot Linux on RISC-V including the Privileged Architecture, OpenSBI and U-Boot, and how that fits into the upcoming RISC-V Platform Specification. I will break down support for existing hardware and current upstreaming efforts. I will also discuss how the arch/riscv maintenance guidelines try to avoid unnecessary churn as the landscape of RISC-V extensions continues to evolve.
What is the primary role of the Supervisor Binary Interface (SBI) in the RISC-V boot/privilege model?
AIt is an extension to the RISC-V ISA that adds new instructions for supervisor mode.
BIt defines the calling convention between S-mode and M-mode to abstract platform-specific services without changing the ISA.
CIt is a hardware interconnect standard that ensures cache coherence between harts.
DIt replaces the device tree by providing a runtime description of hardware to the kernel.
EIt is a Linux kernel module that emulates machine-mode firmware services in S-mode.
What approach does OpenSBI's 'generic platform support' promote for handling platform-specific differences?
AInclude a dedicated platform driver in OpenSBI for every new board so OpenSBI knows the platform at build time.
BRequire each Linux distribution to ship a custom OpenSBI binary per board to ensure compatibility.
CHave the first-stage bootloader (e.g., U-Boot) pass a device tree to OpenSBI so one OpenSBI binary can work across platforms.
DUse a fixed, built-in hardware database in OpenSBI that enumerates known SoCs and their quirks.
EEliminate device trees entirely and rely on environment variables set by ROM firmware for platform description.
Why was support for page-based memory types (and the T-Head variant) important for Linux on some RISC-V SoCs like the Allwinner D1?
ABecause the RISC-V privilege spec mandated coherent interconnects and page-based memory types were needed to enforce coherence.
BBecause some cores used reserved bits in page table entries to mark device I/O memory due to lack of a standard extension, so Linux needed to support both the new standard and the vendor variant.
CBecause device drivers must always rely on hardware DMA to be coherent and page-based types replace DMA entirely.
DBecause page-based memory types are required to enable the vector extension for high-performance I/O.
EBecause using page-based memory types eliminates the need for cache management instructions on all RISC-V systems.
According to the RISC-V Platform Specification discussion in the talk, what is a key boot/description requirement for 'embedded' OSA platforms (single-board computers/mobile devices)?
AThey must implement full ACPI and be PCI Express centric like server platforms.
BThey should boot directly from ROM into a Linux kernel; no bootloader or firmware is allowed.
CThey must comply with eBBR (a subset of UEFI) for boot and use Device Tree to describe hardware; U-Boot already implements this.
DThey are required to use a proprietary vendor firmware interface instead of UEFI or Device Tree.
EThey must always expose hardware via a standardized JSON descriptor instead of Device Tree or ACPI.
Drew,
Thank you for your talk! It sounds like RISC-V is working well for Western Digital and NVIDIA and others. Do you think we'll see even bigger companies shift to RISC-V? If not, what do you see as the main reasons that they would keeping an expensive license with Arm, for example?
Drew,
Thank you for your talk! It sounds like RISC-V is working well for Western Digital and NVIDIA and others. Do you think we'll see even bigger companies shift to RISC-V? If not, what do you see as the main reasons that they would keeping an expensive license with Arm, for example?