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Introduction to RISC-V for Embedded Developers

Benix Vincent Theogaraj - Watch Now - Duration: 26:06

Introduction to RISC-V for Embedded Developers
Benix Vincent Theogaraj

The embedded software architecture has changed a lot in recent past.

Most of the embedded software has evolved from monolithic design to well abstracted, modular, scalable, configurable, and extensible in recent past.

However, the embedded processors on which these embedded software run did not undergo much change in this regard.

This talk discusses how RISC-V’s unique characteristics of its free and open ISA (Instruction Set Architecture) brings the modularity, extensibility, scalability, and customizability to embedded processor design.

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wtoner
Score: 0 | 5 months ago | 1 reply

The link for archived Zoom Live Discussion for this session is broken

bvincentSpeaker
Score: 0 | 5 months ago | no reply

There wasn't any Zoom Live discussion for this session.

Jay.Cosper
Score: 0 | 5 months ago | 1 reply

Thanks for the talk. Slide 6 shows a list of instructions, including NOP. But on slide 7 you discuss how no-operation was implemented. What it NOP then?

bvincentSpeaker
Score: 0 | 5 months ago | no reply

NOP is a pseudo instruction and it should be removed from slide 6. Thanks for pointing out !

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